1. Field of the Invention
The present invention relates to rate matching in display technology links and, in particular, to data rate buffering in data links.
2. Discussion of Related Art
Digital display technology for video streams is being widely adopted within the personal computer (PC) and consumer electronics (CE) industries. The VESA DisplayPort Standard, Version 1, Revision 1a of Jan. 11, 2008 for video data links (hereinafter DisplayPort, or DP), incorporated herein by reference in its entirety, is an example of a standard that may be used for transmission of video streams.
The issue of data rate matching arises for a data link between a source of imaging data (the Source device) and a receiver of the data (the Sink device). In some cases, the source device transmits data at rates that differ from the display rate of the sink device. For example, different data rates may occur where a source intended for a protocol different from the DP standard is retro-fitted to transmit DP data. Moreover, in some cases the source device may drive data at a constant rate while the link used to connect to the sink device may be operated at varying data rates using operation techniques such as a spread spectrum clock (SSC) to provide a reduction in electromagnetic interference (EMI). By having such a mismatch in data rates between the source device and the sink device, underflow and overflow errors in the sink device buffer may be encountered, which may stall and break the data link, interrupting the video transmission.
What is needed with the adoption and compliance of DisplayPort standards is rate matching that avoids buffer underflow and overflow errors in a data link.